27 #ifndef SYSTEM_CORE_INC_DRIVERS_ETH_OC_ETH_PHY_H_ 28 #define SYSTEM_CORE_INC_DRIVERS_ETH_OC_ETH_PHY_H_ 32 #ifdef oC_ETH_LLD_AVAILABLE 39 #define _________________________________________DEFINITIONS_SECTION________________________________________________________________________ 42 #undef _________________________________________DEFINITIONS_SECTION________________________________________________________________________ 49 #define _________________________________________TYPES_SECTION______________________________________________________________________________ 79 #if defined(LITTLE_ENDIAN) 82 uint32_t Reserved0_7:8;
83 uint32_t DuplexMode:1;
84 uint32_t RestartAutonegotiate:1;
87 uint32_t AutoNegotiation:1;
88 uint32_t SpeedSelect:1;
91 uint32_t Reserved16_31:16;
93 #elif defined(BIG_ENDIAN) 94 # error The structure is not prepared for the BIG_ENDIAN 96 # error ENDIANNES not defined! 111 #if defined(LITTLE_ENDIAN) 114 uint32_t ExtendedCapabilities:1;
115 uint32_t JabberDetect:1;
116 uint32_t LinkStatus:1;
117 uint32_t AutoNegotiateAbility:1;
118 uint32_t RemoteFault:1;
119 uint32_t AutoNegotiateComplete:1;
120 uint32_t Reserved6_7:2;
121 uint32_t ExtendedStatus:1;
122 uint32_t HalfDuplex100BASET2:1;
123 uint32_t FullDuplex100BASET2:1;
124 uint32_t HalfDuplex10BASET:1;
125 uint32_t FullDuplex10BASET:1;
126 uint32_t HalfDuplex100BASETX:1;
127 uint32_t FullDuplex100BASETX:1;
128 uint32_t T4100BASE:1;
129 uint32_t Reserved16_31:16;
131 #elif defined(BIG_ENDIAN) 132 # error The structure is not prepared for the BIG_ENDIAN 134 # error ENDIANNES not defined! 139 #undef _________________________________________TYPES_SECTION______________________________________________________________________________ 146 #define _________________________________________PROTOTYPES_SECTION_________________________________________________________________________ 155 #undef _________________________________________PROTOTYPES_SECTION_________________________________________________________________________ Maximum value for the register address.
oC_ErrorCode_t oC_ETH_SetPhyLoopback(oC_ETH_PhyAddress_t PhyAddress, bool Enabled)
enables/disables PHY loopback mode
oC_ErrorCode_t oC_ETH_PhyReset(oC_ETH_PhyAddress_t PhyAddress)
resets PHY
stores value of the BSR register
oC_ETH_PhyRegister_BasicStatusRegister
uint32_t Value
Stores value of the register.
oC_ETH_PhyRegister_t
stores PHY register address
oC_ETH_PhyRegister_BasicControlRegister
oC_ErrorCode_t oC_ETH_SetAutoNegotiation(oC_ETH_PhyAddress_t PhyAddress, bool Enabled, oC_Time_t Timeout)
enables/disables AutoNegotiation
uint32_t Value
Stores value of the register.
oC_ErrorCode_t oC_ETH_ReadPhyRegister(oC_ETH_PhyAddress_t PhyAddress, oC_ETH_PhyRegister_t Register, uint32_t *outValue)
writes PHY register
stores value of the BCR register
oC_ETH_PhyAddress_t PhyAddress
Address of the external PHY.
oC_Net_LinkStatus_t
stores network interface link status
oC_ETH_LLD_PHY_Address_t oC_ETH_PhyAddress_t
stores address of a PHY
oC_ErrorCode_t oC_ETH_ReadLinkStatus(oC_ETH_PhyAddress_t PhyAddress, oC_Net_LinkStatus_t *outLinkStatus)
reads link status from the PHY
The file with interface for ETH driver.
oC_ErrorCode_t oC_ETH_WritePhyRegister(oC_ETH_PhyAddress_t PhyAddress, oC_ETH_PhyRegister_t Register, uint32_t Value)
writes PHY register