38 #define _________________________________________MACROS_SECTION_____________________________________________________________________________ 40 #define IsRam(Address) (oC_LSF_IsRamAddress(Address) || oC_LSF_IsExternalAddress(Address)) 41 #define IsRom(Address) oC_LSF_IsRomAddress(Address) 42 #define IsCorrect(Address) oC_LSF_IsCorrectAddress(Address) 43 #define ALIGN_ADDRESS(Address,Alignment) ((void*)((((oC_UInt_t)Address) + Alignment - 1) & ~(Alignment-1))) 44 #define IsAligned(Address,Alignment) ( ALIGN_ADDRESS(Address,Alignment) == Address ) 47 #undef _________________________________________MACROS_SECTION_____________________________________________________________________________ 55 #define _________________________________________TYPES_SECTION______________________________________________________________________________ 65 typedef volatile struct 95 #undef _________________________________________TYPES_SECTION______________________________________________________________________________ 102 #define _________________________________________LOCAL_VARIABLES_SECTION____________________________________________________________________ 141 static const oC_MemorySize_t PossibleMemoryRegionSizes[] = {
192 #undef _________________________________________LOCAL_VARIABLES_SECTION____________________________________________________________________ 199 #define _________________________________________LOCAL_PROTOTYPES_SECTION___________________________________________________________________ 201 static inline void TriggerPendSV (
void );
202 static bool IsStackCorrect (
oC_Stack_t Stack );
203 static oC_MemorySize_t FindMemoryRegionSize ( oC_MemorySize_t Size ,
bool AlignSize , uint8_t * outSizeId );
205 static void SetPowerForMpu (
oC_Power_t Power );
208 #undef _________________________________________LOCAL_PROTOTYPES_SECTION___________________________________________________________________ 216 #define _________________________________________INTERRUPTS_HANDLERS_SECTION________________________________________________________________ 226 oC_ASSERT(CurrentStack !=
NULL);
229 if(GlobalFindNextStackHandler !=
NULL)
231 GlobalFindNextStackHandler();
238 if(NextStack !=
NULL)
256 "STMDB r1!, {r4-r11} \n\t" 257 "STR r1, [r12, #0] \n\t" 264 "LDR r1, [%1, #0] \n\t" 265 "LDMFD r1!, {r4-r11} \n\t" 267 "STR r1, [r12, #0] \n\t" 272 CurrentStack = NextStack;
279 #undef _________________________________________INTERRUPTS_HANDLERS_SECTION________________________________________________________________ 286 #define _________________________________________INTERFACE_FUNCTIONS_SECTION________________________________________________________________ 289 #define __NVIC_PRIO_BITS oC_MACHINE_PRIO_BITS 290 #define __MPU_PRESENT 1 292 #include <core_cm4.h> 311 CurrentStack = SystemStack;
323 return (
void*)SCB->BFAR;
335 __asm
volatile(
"dsb" );
336 __asm
volatile(
"isb" );
358 uint32_t basepri = __get_BASEPRI();
370 NVIC_EnableIRQ(InterruptNumber);
381 NVIC_DisableIRQ(InterruptNumber);
392 return (NVIC->ISER[(uint32_t)((int32_t)InterruptNumber) >> 5] & (uint32_t)(1 << ((uint32_t)((int32_t)InterruptNumber) & (uint32_t)0x1F))) != 0;
402 NVIC_SetPriority(InterruptNumber , Priority);
413 return NVIC_GetPriority(InterruptNumber);
435 oC_Int_t BufferSize ,
437 void * HandlerParameter ,
441 bool success =
false;
447 oC_LSF_IsCorrectAddress(ContextHandler) &&
448 oC_LSF_IsCorrectAddress(ExitHandler)
468 void * bufferEnd = &(((uint8_t*)Buffer)[BufferSize]);
472 if((((
void*)stack) > Buffer) && (((
void*)context) > Buffer))
475 context->PC = (oC_UInt_t)ContextHandler;
476 context->xPSR = oC_MCS_xPSR_INITIAL_VALUE;
477 context->LR = (oC_UInt_t)ExitHandler;
478 context->R0 = (oC_UInt_t)HandlerParameter;
512 return (
void*) __get_PSP();
522 return (
void*) __get_MSP();
531 oC_Int_t stackSize = 0;
535 Stack = CurrentStack;
538 if(IsStackCorrect(Stack))
553 oC_Int_t freeStackSize = 0;
557 Stack = CurrentStack;
562 void * currentStackPointer =
NULL;
564 if(CurrentStack == Stack)
573 if(currentStackPointer >= ((
void*)Stack->
Buffer))
575 freeStackSize = (oC_Int_t)(currentStackPointer - ((
void*)Stack->
Buffer));
579 freeStackSize -= (oC_Int_t)(((
void*)Stack->
Buffer) - currentStackPointer);
583 return freeStackSize;
615 bool stackSwitched =
false;
617 if(IsStackCorrect(Stack))
623 stackSwitched =
true;
626 return stackSwitched;
636 bool configured =
false;
638 if(Prescaler > 0 && oC_LSF_IsCorrectAddress(FindNextStackHandler))
640 if(SysTick_Config(Prescaler) == 0)
645 GlobalFindNextStackHandler = FindNextStackHandler;
685 "mov r3, %[Cycles] \n\t" 690 : [Cycles]
"r" (Cycles)
703 oC_ErrorCode_t errorCode = oC_ErrorCode_ImplementError;
706 ErrorCondition(IsCorrect(Config) , oC_ErrorCode_WrongAddress )
707 && ErrorCondition(IsCorrect(Config->
BaseAddress) , oC_ErrorCode_WrongAddress )
708 && ErrorCondition(Config->
Size > 0 , oC_ErrorCode_SizeNotCorrect )
712 oC_MemorySize_t foundRegionSize = 0;
713 uint8_t accessPermissions = 0;
719 foundRegionSize = FindMemoryRegionSize(Config->
Size,Config->
AlignSize,&sizeId);
722 oC_Procedure_ExitIfFalse( foundRegionSize >= Config->
Size , oC_ErrorCode_SizeNotCorrect);
723 oC_Procedure_ExitIfFalse( accessPermissions < 0xFF , oC_ErrorCode_AccessPermissionsNotPossible);
724 oC_Procedure_ExitIfFalse( IsAligned(Config->
BaseAddress,foundRegionSize) , oC_ErrorCode_AddressNotAligned);
725 oC_Procedure_ExitIfFalse(
728 oC_ErrorCode_AccessPermissionsNotCorrect);
729 oC_Procedure_ExitIfFalse(
732 oC_ErrorCode_AccessPermissionsNotCorrect);
737 MPU->RASR = ((uint32_t)disableExecution << MPU_RASR_XN_Pos) |
738 ((uint32_t)accessPermissions << MPU_RASR_AP_Pos) |
739 ((uint32_t)0x00 << MPU_RASR_TEX_Pos) |
740 (((uint32_t)Config->
Shareable ? 1 : 0) << MPU_RASR_S_Pos) |
741 (((uint32_t)Config->
Cacheable ? 1 : 0) << MPU_RASR_C_Pos) |
742 (((uint32_t)Config->
Bufforable ? 1 : 0) << MPU_RASR_B_Pos) |
743 ((uint32_t)0x00 << MPU_RASR_SRD_Pos) |
744 ((uint32_t)sizeId << MPU_RASR_SIZE_Pos) |
749 errorCode = oC_ErrorCode_None;
765 return (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos;
775 uint32_t numberOfRegions = 0;
781 savedPowerState = GetPowerOfMpu();
785 for(uint32_t i = 0 ; i < maxNumberOfRegions ; i++)
795 SetPowerForMpu(savedPowerState);
799 return numberOfRegions;
811 if(IsRam(outFreeRegionNumber))
818 savedPowerState = GetPowerOfMpu();
822 for(uint32_t i = 0 ; i < maxNumberOfRegions ; i++)
828 *outFreeRegionNumber = i;
834 SetPowerForMpu(savedPowerState);
849 bool success =
false;
853 MPU->CTRL |= MPU_CTRL_PRIVDEFENA_Msk;
858 MPU->CTRL &= ~MPU_CTRL_PRIVDEFENA_Msk;
875 #undef _________________________________________INTERFACE_FUNCTIONS_SECTION________________________________________________________________ 882 #define _________________________________________LOCAL_FUNCTIONS_SECTION____________________________________________________________________ 889 static inline void TriggerPendSV(
void)
891 SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
899 static bool IsStackCorrect(
oC_Stack_t Stack )
901 return IsRam(Stack) &&
920 static oC_MemorySize_t FindMemoryRegionSize( oC_MemorySize_t Size ,
bool AlignSize , uint8_t * outSizeId )
922 oC_MemorySize_t foundSize = 0;
926 oC_ARRAY_FOREACH_IN_ARRAY(PossibleMemoryRegionSizes,regionSize)
928 if((*regionSize) > 0)
930 if((*regionSize) == Size)
932 foundSize = *regionSize;
937 foundSize = *regionSize;
965 uint8_t foundAccessPermissions = 0xFF;
966 uint8_t arraySize =
oC_ARRAY_SIZE(PossibleAccessPermissions);
972 for(uint8_t i = 0; i < arraySize ; i++)
974 if(User == PossibleAccessPermissions[i].User && Privileged == PossibleAccessPermissions[i].Privileged)
976 foundAccessPermissions = i;
980 return foundAccessPermissions;
988 static void SetPowerForMpu(
oC_Power_t Power )
993 MPU->CTRL |= MPU_CTRL_ENABLE_Msk;
996 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
1001 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
1004 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
1018 #undef _________________________________________LOCAL_FUNCTIONS_SECTION____________________________________________________________________ #define oC_InterruptHandler(BASE_NAME, TYPE_NAME)
Define handler for interrupt.
If this flag is set it does mean, that this resource is executable.
oC_Int_t oC_MCS_GetMinimumStackBufferSize(oC_Int_t StackSize)
returns minimum stack buffer size
void * oC_MCS_GetCurrentProcessStackPointer(void)
returns current value of PSP
static bool oC_Bits_AreBitsSetU32(uint32_t BitMask, uint32_t BitsToCheck)
checks if all bits in field are set
#define oC_MCS_AlignStackPointer(Pointer)
align pointer to the stack alignment
#define oC_ARRAY_SIZE(ARRAY)
returns size of static array
#define oC_MCS_IsStackPointerAligned(Pointer)
checks if stack pointer is aligned to the machine stack memory alignment
bool Cacheable
True if the region should be cacheable - If you set a region to be cacheable: When you load from that...
#define GB(GBytes)
Number of GB.
oC_MemorySize_t Size
Size of the region.
bool oC_MCS_SetMemoryAccessMode(oC_MCS_MemoryAccessMode_t Mode)
sets the memory access mode
void(* oC_FindNextStackHandler_t)(void)
stores pointer to function for searching next stack
Memory controller is configured to allow for memory access only for regions that can be accessible by...
void * oC_MCS_GetHardFaultReason(void)
returns address that cause a hard fault
int16_t oC_MCS_CriticalSectionCounter
global variable with critical section nesting counter
oC_Stack_t oC_MCS_GetSystemStack(void)
returns pointer to the system stack
bool oC_MCS_SetInterruptPriority(IRQn_Type InterruptNumber, oC_InterruptPriotity_t Priority)
sets interrupt priority
The file with interface for LSF module.
bool oC_MCS_ReturnToSystemStack(void)
sets next stack as system stack
void oC_MCS_Reboot(void)
Software reboots of machine.
oC_InterruptPriotity_t
stores priority of interrupts
#define B(Bytes)
Number of bytes.
void * oC_MCS_GetCurrentMainStackPointer(void)
returns current value of MSP
const void * BaseAddress
Base address of the region - this must point to the start of the region.
bool oC_MCS_InitializeStack(oC_Stack_t *outStack, void *Buffer, oC_Int_t BufferSize, oC_ContextHandler_t ContextHandler, void *HandlerParameter, oC_ContextExitHandler_t ExitHandler)
initializes stack for the system
bool oC_MCS_EnableInterrupt(IRQn_Type InterruptNumber)
enables interrupt with specified number
void(* oC_ContextHandler_t)(void *ContextParameter)
stores handler of function, that handles context
uint32_t RegionNumber
Number of the region to configure.
oC_ErrorCode_t oC_MCS_ConfigureMemoryRegion(const oC_MCS_MemoryRegionConfig_t *Config)
configures memory region
oC_Int_t oC_MCS_GetFreeStackSize(oC_Stack_t Stack)
returns number of free stack
bool oC_MCS_SetNextStack(oC_Stack_t Stack)
sets next stack for context switching
void oC_MCS_Delay(register oC_UInt_t Cycles)
delays operations for cycles
void(* oC_ContextExitHandler_t)(void)
stores handler of function called, when context handling is finished
bool Bufforable
True if the region should be bufforable - Bufferable means whether a write to the address can be buff...
Something is powered off.
#define oC_MCS_AlignSize(Size, Alignment)
align size to the machine alignment
bool oC_MCS_IsInterruptEnabled(IRQn_Type InterruptNumber)
checks if interrupt is enabled
oC_Access_t UserAccess
Definition of access for user space.
oC_Access_t
Type for storing access (R/W/RW)
bool oC_MCS_ConfigureSystemTimer(oC_UInt_t Prescaler, oC_FindNextStackHandler_t FindNextStackHandler)
configures system timer
bool oC_MCS_AreInterruptsEnabled(void)
Checks if interrupts are enabled in HW.
static bool oC_Bits_AreBitsClearU32(uint32_t BitMask, uint32_t BitsToCheck)
checks if all bits in field are clear
oC_Int_t oC_MCS_GetStackSize(oC_Stack_t Stack)
returns size of stack
Memory controller is configured to allow for memory access for regions that can be accessible by a pr...
Contains machine core specific functions.
The file with functions for the bits operation.
uint32_t oC_MCS_GetNumberOfRegions(void)
returns number of regions that are currently configured
bool oC_MCS_InitializeModule(void)
initializes module to work
IRQn_Type
type for the CMSIS library, that contains definitions of interrupts
static void oC_MCS_EnterCriticalSection(void)
Enters to critical section.
Static array definitions.
oC_MCS_MemoryAccessMode_t
stores memory access mode
oC_Stack_t oC_MCS_GetCurrentStack(void)
returns current stack
configuration structure for the memory region
oC_InterruptPriotity_t oC_MCS_GetInterruptPriority(IRQn_Type InterruptNumber)
returns interrupt priority
oC_Access_t PrivilegedAccess
Definition of access for privileged space (portable or core)
The file with interface interrupt module.
void oC_MCS_DisableInterrupts(void)
Globally disables interrupts (always)
bool oC_MCS_ReadFreeRegionNumber(uint32_t *outFreeRegionNumber)
reads number of a free region
static bool oC_MCS_ExitCriticalSection(void)
Exits from critical section.
void oC_MCS_EnableInterrupts(void)
Globally enables interrupts (always)
#define kB(kBytes)
Number of kB.
The lowest value for priority.
oC_MCS_MemoryAccessMode_t oC_MCS_GetMemoryAccessMode(void)
reads memory access mode
bool Shareable
For a shareable memory region that is implemented, the memory system provides data synchronization be...
oC_Power_t Power
Power state for the region (enabled or disabled)
bool oC_MCS_DisableInterrupt(IRQn_Type InterruptNumber)
disables interrupt with specified number
#define MB(MBytes)
Number of MB.
static oC_UInt_t oC_LSF_GetProcessStackSize(void)
returns size of the section in linkage
static void * oC_LSF_GetProcessStackStart(void)
returns stack start address
oC_Power_t
stores registers power state
bool AlignSize
True if the MCS should find the size nearest to the value given as the Size field.
uint32_t oC_MCS_GetMaximumNumberOfRegions(void)
returns maximum number of regions handled by the machine
The most important interrupt priority, that is possible in the machine.
#define NULL
pointer to a zero