31 #ifndef SYSTEM_PORTABLE_INC_TI_LM4F_LM4FH5QR_OC_MACHINE_DEFS_H_ 32 #define SYSTEM_PORTABLE_INC_TI_LM4F_LM4FH5QR_OC_MACHINE_DEFS_H_ 40 #define _________________________________________CPU_DEFINITIONS_SECTION____________________________________________________________________ 48 #define oC_MACHINE LM4F120H5QR 56 #define oC_MACHINE_FAMILY LM4F 64 #define oC_MACHINE_CORTEX ARM_Cortex_M4 72 #define oC_MACHINE_PRIO_BITS 3 80 #define oC_MACHINE_MEMORY_ALIGNMENT_BYTES 4 88 #define oC_MACHINE_STACK_TOP_ALIGNMENT_BYTES 8 96 #define oC_MACHINE_PRECISION_INTERNAL_OSCILLATOR_FREQUENCY oC_MHz(16) 104 #define oC_MACHINE_INTERNAL_OSCILLATOR_FREQUENCY oC_kHz(30) 112 #define oC_MACHINE_HIBERNATION_OSCILLATOR_FREQUENCY oC_Hz(32768) 120 #define oC_MACHINE_MAXIMUM_FREQUENCY oC_MHz(80) 129 #define oC_Machine_DefaultFrequency oC_MACHINE_PRECISION_INTERNAL_OSCILLATOR_FREQUENCY 136 #define oC_MACHINE_xPSR_INITIAL_VALUE 0x01000000 144 #define oC_MACHINE_STACK_PUSH_IS_DECREMENTING_ADDRESS true 147 #undef _________________________________________CPU_DEFINITIONS_SECTION____________________________________________________________________ 149 #define oC_MACHINE_GPIO_LOCK_KEY (0x4C4F434BUL) 150 #define oC_Machine_GetDigitalFunctionOfPeripheralPin( PeripheralPin ) ( PeripheralPin & 0x7 ) 157 #define _________________________________________DMA_SECTION________________________________________________________________________________ 169 #define oC_MACHINE_DMA_SIGNAL_TYPE_LIST(ADD_SIGNAL) \ 170 ADD_SIGNAL( EP1_RX ) \ 171 ADD_SIGNAL( EP1_TX ) \ 172 ADD_SIGNAL( EP2_RX ) \ 173 ADD_SIGNAL( EP2_TX )\ 174 ADD_SIGNAL( EP3_RX ) \ 175 ADD_SIGNAL( EP3_TX ) \ 178 ADD_SIGNAL( Default ) \ 192 #define oC_MACHINE_DMA_SIGNAL_TYPE_WIDTH 4 200 #define oC_MACHINE_DMA_ENCODING_VALUE_WIDTH 4 222 #define oC_MACHINE_DMA_CHANNELS_ASSIGNMENTS_LIST(ADD_CHANNEL_ASSIGNMENT) \ 223 ADD_CHANNEL_ASSIGNMENT( uDMA0 , USB0 , EP1_RX , SB , 0)\ 224 ADD_CHANNEL_ASSIGNMENT( uDMA1 , USB0 , EP1_TX , B , 0)\ 225 ADD_CHANNEL_ASSIGNMENT( uDMA2 , USB0 , EP2_RX , B , 0)\ 226 ADD_CHANNEL_ASSIGNMENT( uDMA3 , USB0 , EP2_TX , B , 0)\ 227 ADD_CHANNEL_ASSIGNMENT( uDMA4 , USB0 , EP3_RX , B , 0)\ 228 ADD_CHANNEL_ASSIGNMENT( uDMA5 , USB0 , EP3_TX , B , 0)\ 229 ADD_CHANNEL_ASSIGNMENT( uDMA6 , Software , Default , B , 0)\ 230 ADD_CHANNEL_ASSIGNMENT( uDMA7 , Software , Default , B , 0)\ 231 ADD_CHANNEL_ASSIGNMENT( uDMA8 , UART0 , RX , SB , 0)\ 232 ADD_CHANNEL_ASSIGNMENT( uDMA9 , UART0 , TX , SB , 0)\ 233 ADD_CHANNEL_ASSIGNMENT( uDMA10 , SSI0 , RX , SB , 0)\ 234 ADD_CHANNEL_ASSIGNMENT( uDMA11 , SSI0 , TX , SB , 0)\ 235 ADD_CHANNEL_ASSIGNMENT( uDMA12 , Software , Default , B , 0)\ 236 ADD_CHANNEL_ASSIGNMENT( uDMA13 , Software , Default , B , 0)\ 237 ADD_CHANNEL_ASSIGNMENT( uDMA14 , ADC0 , SS0 , B , 0)\ 238 ADD_CHANNEL_ASSIGNMENT( uDMA15 , ADC0 , SS1 , B , 0)\ 239 ADD_CHANNEL_ASSIGNMENT( uDMA16 , ADC0 , SS2 , B , 0)\ 240 ADD_CHANNEL_ASSIGNMENT( uDMA17 , ADC0 , SS3 , B , 0)\ 241 ADD_CHANNEL_ASSIGNMENT( uDMA18 , Timer0 , A , B , 0)\ 242 ADD_CHANNEL_ASSIGNMENT( uDMA19 , Timer0 , B , B , 0)\ 243 ADD_CHANNEL_ASSIGNMENT( uDMA20 , Timer1 , A , B , 0)\ 244 ADD_CHANNEL_ASSIGNMENT( uDMA21 , Timer1 , B , B , 0)\ 245 ADD_CHANNEL_ASSIGNMENT( uDMA22 , UART1 , RX , SB , 0)\ 246 ADD_CHANNEL_ASSIGNMENT( uDMA23 , UART1 , TX , SB , 0)\ 247 ADD_CHANNEL_ASSIGNMENT( uDMA24 , SSI1 , RX , SB , 0)\ 248 ADD_CHANNEL_ASSIGNMENT( uDMA25 , SSI1 , TX , SB , 0)\ 249 ADD_CHANNEL_ASSIGNMENT( uDMA26 , Software , Default , B , 0)\ 250 ADD_CHANNEL_ASSIGNMENT( uDMA27 , Software , Default , B , 0)\ 251 ADD_CHANNEL_ASSIGNMENT( uDMA28 , Software , Default , B , 0)\ 252 ADD_CHANNEL_ASSIGNMENT( uDMA29 , Software , Default , B , 0)\ 253 ADD_CHANNEL_ASSIGNMENT( uDMA30 , Software , Default , B , 0)\ 254 ADD_CHANNEL_ASSIGNMENT( uDMA0 , UART2 , RX , SB , 1)\ 255 ADD_CHANNEL_ASSIGNMENT( uDMA1 , UART2 , TX , SB , 1)\ 256 ADD_CHANNEL_ASSIGNMENT( uDMA2 , Timer3 , A , B , 1)\ 257 ADD_CHANNEL_ASSIGNMENT( uDMA3 , Timer3 , B , B , 1)\ 258 ADD_CHANNEL_ASSIGNMENT( uDMA4 , Timer2 , A , B , 1)\ 259 ADD_CHANNEL_ASSIGNMENT( uDMA5 , Timer2 , B , B , 1)\ 260 ADD_CHANNEL_ASSIGNMENT( uDMA6 , Timer2 , A , B , 1)\ 261 ADD_CHANNEL_ASSIGNMENT( uDMA7 , Timer2 , B , B , 1)\ 262 ADD_CHANNEL_ASSIGNMENT( uDMA8 , UART1 , RX , SB , 1)\ 263 ADD_CHANNEL_ASSIGNMENT( uDMA9 , UART1 , TX , SB , 1)\ 264 ADD_CHANNEL_ASSIGNMENT( uDMA10 , SSI1 , RX , SB , 1)\ 265 ADD_CHANNEL_ASSIGNMENT( uDMA11 , SSI1 , TX , SB , 1)\ 266 ADD_CHANNEL_ASSIGNMENT( uDMA12 , UART2 , RX , SB , 1)\ 267 ADD_CHANNEL_ASSIGNMENT( uDMA13 , UART2 , TX , SB , 1)\ 268 ADD_CHANNEL_ASSIGNMENT( uDMA14 , Timer2 , A , B , 1)\ 269 ADD_CHANNEL_ASSIGNMENT( uDMA15 , Timer2 , B , B , 1)\ 270 ADD_CHANNEL_ASSIGNMENT( uDMA16 , Software , Default , B , 1)\ 271 ADD_CHANNEL_ASSIGNMENT( uDMA17 , Software , Default , B , 1)\ 272 ADD_CHANNEL_ASSIGNMENT( uDMA18 , Timer1 , A , B , 1)\ 273 ADD_CHANNEL_ASSIGNMENT( uDMA19 , Timer1 , B , B , 1)\ 274 ADD_CHANNEL_ASSIGNMENT( uDMA20 , Software , Default , B , 1)\ 275 ADD_CHANNEL_ASSIGNMENT( uDMA21 , Software , Default , B , 1)\ 276 ADD_CHANNEL_ASSIGNMENT( uDMA22 , Software , Default , B , 1)\ 277 ADD_CHANNEL_ASSIGNMENT( uDMA23 , Software , Default , B , 1)\ 278 ADD_CHANNEL_ASSIGNMENT( uDMA24 , ADC1 , SS0 , B , 1)\ 279 ADD_CHANNEL_ASSIGNMENT( uDMA25 , ADC1 , SS1 , B , 1)\ 280 ADD_CHANNEL_ASSIGNMENT( uDMA26 , ADC1 , SS2 , B , 1)\ 281 ADD_CHANNEL_ASSIGNMENT( uDMA27 , ADC1 , SS3 , B , 1)\ 282 ADD_CHANNEL_ASSIGNMENT( uDMA28 , Software , Default , B , 1)\ 283 ADD_CHANNEL_ASSIGNMENT( uDMA29 , Software , Default , B , 1)\ 284 ADD_CHANNEL_ASSIGNMENT( uDMA30 , Software , Default , B , 1)\ 285 ADD_CHANNEL_ASSIGNMENT( uDMA0 , Software , Default , B , 2)\ 286 ADD_CHANNEL_ASSIGNMENT( uDMA1 , Software , Default , B , 2)\ 287 ADD_CHANNEL_ASSIGNMENT( uDMA2 , Software , Default , B , 2)\ 288 ADD_CHANNEL_ASSIGNMENT( uDMA3 , Software , Default , B , 2)\ 289 ADD_CHANNEL_ASSIGNMENT( uDMA4 , Software , Default , B , 2)\ 290 ADD_CHANNEL_ASSIGNMENT( uDMA5 , Software , Default , B , 2)\ 291 ADD_CHANNEL_ASSIGNMENT( uDMA6 , UART5 , RX , SB , 2)\ 292 ADD_CHANNEL_ASSIGNMENT( uDMA7 , UART5 , TX , SB , 2)\ 293 ADD_CHANNEL_ASSIGNMENT( uDMA8 , Software , Default , B , 2)\ 294 ADD_CHANNEL_ASSIGNMENT( uDMA9 , Software , Default , B , 2)\ 295 ADD_CHANNEL_ASSIGNMENT( uDMA10 , UART6 , RX , SB , 2)\ 296 ADD_CHANNEL_ASSIGNMENT( uDMA11 , UART6 , TX , SB , 2)\ 297 ADD_CHANNEL_ASSIGNMENT( uDMA12 , SSI2 , RX , SB , 2)\ 298 ADD_CHANNEL_ASSIGNMENT( uDMA13 , SSI2 , TX , SB , 2)\ 299 ADD_CHANNEL_ASSIGNMENT( uDMA14 , SSI3 , RX , SB , 2)\ 300 ADD_CHANNEL_ASSIGNMENT( uDMA15 , SSI3 , TX , SB , 2)\ 301 ADD_CHANNEL_ASSIGNMENT( uDMA16 , UART3 , RX , SB , 2)\ 302 ADD_CHANNEL_ASSIGNMENT( uDMA17 , UART3 , TX , SB , 2)\ 303 ADD_CHANNEL_ASSIGNMENT( uDMA18 , UART4 , RX , SB , 2)\ 304 ADD_CHANNEL_ASSIGNMENT( uDMA19 , UART4 , TX , SB , 2)\ 305 ADD_CHANNEL_ASSIGNMENT( uDMA20 , UART7 , RX , SB , 2)\ 306 ADD_CHANNEL_ASSIGNMENT( uDMA21 , UART7 , TX , SB , 2)\ 307 ADD_CHANNEL_ASSIGNMENT( uDMA22 , Software , Default , B , 2)\ 308 ADD_CHANNEL_ASSIGNMENT( uDMA23 , Software , Default , B , 2)\ 309 ADD_CHANNEL_ASSIGNMENT( uDMA24 , Software , Default , B , 2)\ 310 ADD_CHANNEL_ASSIGNMENT( uDMA25 , Software , Default , B , 2)\ 311 ADD_CHANNEL_ASSIGNMENT( uDMA26 , Software , Default , B , 2)\ 312 ADD_CHANNEL_ASSIGNMENT( uDMA27 , Software , Default , B , 2)\ 313 ADD_CHANNEL_ASSIGNMENT( uDMA28 , Software , Default , B , 2)\ 314 ADD_CHANNEL_ASSIGNMENT( uDMA29 , Software , Default , B , 2)\ 315 ADD_CHANNEL_ASSIGNMENT( uDMA30 , Software , Default , B , 2)\ 316 ADD_CHANNEL_ASSIGNMENT( uDMA0 , Timer4 , A , B , 3)\ 317 ADD_CHANNEL_ASSIGNMENT( uDMA1 , Timer4 , B , B , 3)\ 318 ADD_CHANNEL_ASSIGNMENT( uDMA2 , Software , Default , B , 3)\ 319 ADD_CHANNEL_ASSIGNMENT( uDMA3 , Software , Default , B , 3)\ 320 ADD_CHANNEL_ASSIGNMENT( uDMA4 , PORTA , Default , B , 3)\ 321 ADD_CHANNEL_ASSIGNMENT( uDMA5 , PORTB , Default , B , 3)\ 322 ADD_CHANNEL_ASSIGNMENT( uDMA6 , PORTC , Default , B , 3)\ 323 ADD_CHANNEL_ASSIGNMENT( uDMA7 , PORTD , Default , B , 3)\ 324 ADD_CHANNEL_ASSIGNMENT( uDMA8 , Timer5 , A , B , 3)\ 325 ADD_CHANNEL_ASSIGNMENT( uDMA9 , Timer5 , B , B , 3)\ 326 ADD_CHANNEL_ASSIGNMENT( uDMA10 , WideTimer0 , A , B , 3)\ 327 ADD_CHANNEL_ASSIGNMENT( uDMA11 , WideTimer0 , B , B , 3)\ 328 ADD_CHANNEL_ASSIGNMENT( uDMA12 , WideTimer1 , A , B , 3)\ 329 ADD_CHANNEL_ASSIGNMENT( uDMA13 , WideTimer1 , B , B , 3)\ 330 ADD_CHANNEL_ASSIGNMENT( uDMA14 , PORTE , Default , B , 3)\ 331 ADD_CHANNEL_ASSIGNMENT( uDMA15 , PORTF , Default , B , 3)\ 332 ADD_CHANNEL_ASSIGNMENT( uDMA16 , WideTimer2 , A , B , 3)\ 333 ADD_CHANNEL_ASSIGNMENT( uDMA17 , WideTimer2 , B , B , 3)\ 334 ADD_CHANNEL_ASSIGNMENT( uDMA18 , PORTB , Default , B , 3)\ 335 ADD_CHANNEL_ASSIGNMENT( uDMA19 , Software , Default , B , 3)\ 336 ADD_CHANNEL_ASSIGNMENT( uDMA20 , Software , Default , B , 3)\ 337 ADD_CHANNEL_ASSIGNMENT( uDMA21 , Software , Default , B , 3)\ 338 ADD_CHANNEL_ASSIGNMENT( uDMA22 , Software , Default , B , 3)\ 339 ADD_CHANNEL_ASSIGNMENT( uDMA23 , Software , Default , B , 3)\ 340 ADD_CHANNEL_ASSIGNMENT( uDMA24 , WideTimer3 , A , B , 3)\ 341 ADD_CHANNEL_ASSIGNMENT( uDMA25 , WideTimer3 , B , B , 3)\ 342 ADD_CHANNEL_ASSIGNMENT( uDMA26 , WideTimer4 , A , B , 3)\ 343 ADD_CHANNEL_ASSIGNMENT( uDMA27 , WideTimer4 , B , B , 3)\ 344 ADD_CHANNEL_ASSIGNMENT( uDMA28 , WideTimer5 , A , B , 3)\ 345 ADD_CHANNEL_ASSIGNMENT( uDMA29 , WideTimer5 , B , B , 3)\ 346 ADD_CHANNEL_ASSIGNMENT( uDMA30 , Software , Default , B , 3)\ 347 ADD_CHANNEL_ASSIGNMENT( uDMA0 , Software , Default , B , 4)\ 348 ADD_CHANNEL_ASSIGNMENT( uDMA1 , Software , Default , B , 4)\ 349 ADD_CHANNEL_ASSIGNMENT( uDMA2 , Software , Default , B , 4)\ 350 ADD_CHANNEL_ASSIGNMENT( uDMA3 , Software , Default , B , 4)\ 351 ADD_CHANNEL_ASSIGNMENT( uDMA4 , Software , Default , B , 4)\ 352 ADD_CHANNEL_ASSIGNMENT( uDMA5 , Software , Default , B , 4)\ 353 ADD_CHANNEL_ASSIGNMENT( uDMA6 , Software , Default , B , 4)\ 354 ADD_CHANNEL_ASSIGNMENT( uDMA7 , Software , Default , B , 4)\ 355 ADD_CHANNEL_ASSIGNMENT( uDMA8 , Software , Default , B , 4)\ 356 ADD_CHANNEL_ASSIGNMENT( uDMA9 , Software , Default , B , 4)\ 357 ADD_CHANNEL_ASSIGNMENT( uDMA10 , Software , Default , B , 4)\ 358 ADD_CHANNEL_ASSIGNMENT( uDMA11 , Software , Default , B , 4)\ 359 ADD_CHANNEL_ASSIGNMENT( uDMA12 , Software , Default , B , 4)\ 360 ADD_CHANNEL_ASSIGNMENT( uDMA13 , Software , Default , B , 4)\ 361 ADD_CHANNEL_ASSIGNMENT( uDMA14 , Software , Default , B , 4)\ 362 ADD_CHANNEL_ASSIGNMENT( uDMA15 , Software , Default , B , 4)\ 363 ADD_CHANNEL_ASSIGNMENT( uDMA16 , Software , Default , B , 4)\ 364 ADD_CHANNEL_ASSIGNMENT( uDMA17 , Software , Default , B , 4)\ 365 ADD_CHANNEL_ASSIGNMENT( uDMA18 , Software , Default , B , 4)\ 366 ADD_CHANNEL_ASSIGNMENT( uDMA19 , Software , Default , B , 4)\ 367 ADD_CHANNEL_ASSIGNMENT( uDMA20 , Software , Default , B , 4)\ 368 ADD_CHANNEL_ASSIGNMENT( uDMA21 , Software , Default , B , 4)\ 369 ADD_CHANNEL_ASSIGNMENT( uDMA22 , Software , Default , B , 4)\ 370 ADD_CHANNEL_ASSIGNMENT( uDMA23 , Software , Default , B , 4)\ 371 ADD_CHANNEL_ASSIGNMENT( uDMA24 , Software , Default , B , 4)\ 372 ADD_CHANNEL_ASSIGNMENT( uDMA25 , Software , Default , B , 4)\ 373 ADD_CHANNEL_ASSIGNMENT( uDMA26 , Software , Default , B , 4)\ 374 ADD_CHANNEL_ASSIGNMENT( uDMA27 , Software , Default , B , 4)\ 375 ADD_CHANNEL_ASSIGNMENT( uDMA28 , Software , Default , B , 4)\ 376 ADD_CHANNEL_ASSIGNMENT( uDMA29 , Software , Default , B , 4)\ 377 ADD_CHANNEL_ASSIGNMENT( uDMA30 , Software , Default , B , 4)\ 380 #undef _________________________________________DMA_SECTION________________________________________________________________________________ 383 #define _________________________________________SPI_SECTION________________________________________________________________________________ 385 #define oC_MACHINE_SPI_MINIMUM_TRANSMISION_FREQUENCY oC_MHz(2) 386 #define oC_MACHINE_SPI_MAXIMUM_TRANSMISION_FREQUENCY oC_MHz(25) 388 #define oC_MACHINE_SPI_MINIMUM_FRAME_WIDTH 4 389 #define oC_MACHINE_SPI_MAXIMUM_FRAME_WIDTH 16 391 #undef _________________________________________SPI_SECTION________________________________________________________________________________ The file with frequency definitions.